The present invention relates to a superconducting memory device and, more particularly, to a superconducting memory device utilizing Abrikosov vortex as information.
A conventional superconducting memory device utilizes as a detecting section a Josephson junction, which realizes the Josephson effect upon the loose coupling of two superconductors through a thin insulating film (i.e., a tunnel barrier layer). In the Josephson junction, a Josephson current flowed between the superconductors can be modulated by an external magnetic flux, and the junction voltage is varied across the Josephson junction. By utilizing this phenomenon, stored information can be read out or detected as a "0" (zero-voltage state) or a "1" (non-voltage voltage state).
A typical example of a conventional superconducting memory device is a persistant current-type memory using the above-mentioned Josephson junction as a gate, described by W.H. Henkels et al. in IBM Journal Research Develop., Vol. 24, No. 2.
However, this memory has the following drawbacks:
(1) Since Josephson gates are combined to constitute a memory cell, the memory cell arrangement is complicated, and the number of Josephson junctions per memory cell is large. A memory of this type is not suitable for high-density integration.
(2) Since the Josephson vortex is stored as storage data in an inductance loop and the area of inductance is large, a compact cell cannot be obtained.
(3) Since the matrix size of the memory element and the lead on the matrix driver increase, memory access time is not nearly as fast as could be expected from the switching time of the element.
In order to solve the above problems, a superconducting memory device has been developed wherein an Abrikosov vortex generated in a type-II superconductor is used as an information bit. The superconducting memory device comprises: a first superconductor film of a type-II superconductor constituting a square or rectangular lower electrode; a second superconductor film formed to surround three edges of the first superconductor film and having a thickness larger than that of the first film; a third superconductor film which is formed through a tunnel barrier layer on the portion of the first superconductor film surrounded by the second superconductor film and which serves as a counter electrode constituting a Josephson junction together with the base electrode and the tunnel barrier layer; and a superconductor write control line formed in parallel with the open edge of the first superconductor film but positioned slightly apart therefrom. The second superconductor film serves to limit the vortex diffusion which causes decrease of the vortices in the first superconductor film.
However, such conventional superconducting memory device stores "1" and "0" data bits as the presence or absence, respectively, of the Abrikosov vortex. Explaining it in more detail, in write mode, a write current is supplied through the write control line to generate a magnetic flux, thereby internally generating the Abrikosov vortex from the open edge of the first superconductor film near the write control line. When a "1" is to be written, a current is supplied through the write control line in a forward direction. However, when a "0" is to be written, a current is supplied through the write control line in the reverse direction, so that the vortex generated in the first superconductor film when "1" was written is cancelled, thus setting the number of vortices to zero. According to another technique for writing a "0", by flowing current in the superconductor film the vortex held in the superconductor film is removed from the film. In another example, a heating resistor is arranged under the first superconductor film for writing "0 " so that the first superconductor film is transferred to its normal state, thereby removing the vortex from the film. The detection of storage information is accomplished by utilizing the fact that, when Abrikosov vortex is present in the base electrode of the Josephson junction, the effective Josephson area is decreased and the critical Josephson current is also decreased. Under such state, when a bias current is flowed through the Josephson junction, it is switched to a non-zero voltage state. On the other hand, where the vortex is not present in the base electrode, even if the bias current is flowed through the Josephson junction, it is not switched to load a superconductive state. These two state are used for detection of "1" and "0" data.
Such superconducting memory devices are described in detail in Applied Physics Letters, Vol. 39, No. 12, December 1981, PP. 992-993, "Trapped Vortex Memory Cells" by Shingo Uehara et al. and in Japanese Preliminary Patent Publication No. 57-181495, issued on Aug. 7, 1982.
In a superconducting memory device of the Abrikosov vortex type having the arrangement described above, where an attempt is made to write a "0", after the present storage state must be read out and checked, "0" is written. When a "0" has already been written in the memory device, i.e., when no vortex is held in the superconductor film, if an attempt is made to write "0", a vortex with an opposite polarity is stored therein. This is not a proper storage state and is detected as an error. In order to avoid this, then, storage data must be read out before write operation is performed. Different write procedures are required in accordance with the storage states of the memory device. However, the write access time and hence the cycle time of the computer are prolonged, which is a critical drawback. When the vortex held in the memory cell is removed and a "0" is written therein, an additional heat wire is required. Further, since the method utilizes thermal transition, the removal of stored data is performed at low speeds and prolongs the write access time. According to another conventional technique for removing the vortex by utilizing a Lorentz current, only one signal line is used to write a "0", and since a current must flow in the superconductor in the write and read modes, the signal line cannot be divided into word and bit lines. Therefore, a specific cell in the memory cell matrix cannot be selected, and a "0" cannot be written in the desired memory cell.
According to the above conventional arrangement, the vortex must be injected into the lower electrode in the Josephson junction so that a large number of vortices are required, thus increasing the operating current in the write mode. It is also difficult to prepare peripheral circuits for driving an arrangement requiring a large operating current.
As described above, the "0" state is achieved by cancelling the previous vortex. When the write cycle of "1" and "0" is repeated, it is impossible to set the number of vortices to be identically zero in the "0" write mode. The residual vortices are accumulated so that erroneous operation of the memory device is induced.
In association with the above-described problem, the "0" state can be accurately maintained by providing vortices having the same number as but a polarity opposite to that of the stored vortex. However, this write operation margin is narrow, and stable operation cannot be expected.